// Base sequence class for testbench sequences class tb_seq_base extends uvm_sequence; `uvm_object_utils(tb_seq_base) // Constructor function new(string name = "tb_seq_base"); super.new(name); endfunction endclass : tb_seq_base // ---------------------------------------------------------------------- class axi_m_seq_base extends tb_seq_base; tb_env env; `uvm_object_utils(axi_m_seq_base) // Constructor function new(string name = "axi_m_seq_base"); super.new(name); endfunction // Task to start the sequence virtual task body(); bit ok = uvm_config_db#(tb_env)::get(uvm_root::get(), "*", "env", env); endtask endclass : axi_m_seq_base // ---------------------------------------------------------------------- class axi_simple_seq extends axi_m_seq_base; `uvm_object_utils(axi_simple_seq) // Constructor function new(string name = "axi_simple_seq"); super.new(name); endfunction // Task to start the sequence virtual task body(); axi_transaction txns[$]; axi_transaction txn; super.body(); `uvm_info("axi_simple_seq", "Starting simple AXI sequence", UVM_LOW) repeat(10) begin `uvm_do(txn, env.get_axi_m_sequencer(), -1, { addr != {`ADDR_WIDTH{1'b0}}; data != {`DATA_WIDTH{1'b0}}; strb == 'hf; // Example byte enable }); `uvm_info("axi_simple_seq", $sformatf("Starting %s transaction [%0s]", txn.txn_type.name(), txn.show_tag()), UVM_LOW) txns.push_back(txn); end `uvm_info("axi_simple_seq", $sformatf("Waiting for %0d txns", txns.size()), UVM_LOW) foreach (txns[i]) begin `uvm_info("axi_simple_seq", $sformatf("Waiting for txn %s", txns[i].show_tag()), UVM_LOW) txns[i].wait_for_done(); `uvm_info("axi_simple_seq", $sformatf("Done waiting for txn %s", txns[i].show_tag()), UVM_LOW) end endtask endclass : axi_simple_seq