# AXI Protocol Playground

## Introduction

* There is no RTL design here. Just validation components working as both
  MANAGER and SUBORDINATE parts

## Dependencies

* Verilator simulator
* UVM that works with Verilator

```
$ cd $UVM_HOME
$ git remote -v
origin  https://github.com/antmicro/uvm-verilator.git (fetch)
origin  https://github.com/antmicro/uvm-verilator.git (push)
$ git branch
  current-patches
* current-patches-2
```