73 lines
2.2 KiB
Systemverilog
73 lines
2.2 KiB
Systemverilog
// ----------------------------------------------------------------------
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class axi_subordinate_driver extends axi_driver;
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`uvm_component_utils(axi_subordinate_driver)
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// --------------------------------------------------
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// Constructor
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function new(string name = "axi_subordinate_driver", uvm_component parent = null);
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super.new(name, parent);
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endfunction
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// --------------------------------------------------
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virtual task run_phase(uvm_phase phase);
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`uvm_info("run_phase", $sformatf("Running AXI subordinate driver: %s",
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get_full_name()), UVM_LOW)
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if (s_if == null) begin
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`uvm_error("run_phase", "subordinate interface is null, cannot respond to transactions")
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end
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forever begin
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@(posedge s_if.ARESETn);
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while (s_if.ARESETn != 0) begin
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@(posedge s_if.ACLK);
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// Following could happen on the same cycle
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if (s_if.AWVALID == 1'b1) begin
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respond_to_write_txn();
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end
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if (s_if.ARVALID == 1'b1) begin
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respond_to_read_txn();
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end
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@(negedge s_if.ACLK);
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end
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end
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endtask
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// ------------------------------------------------------------
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task respond_to_write_txn();
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axi_transaction req;
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req = axi_transaction::type_id::create("req");
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req.txn_type = AXI_WRITE;
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req.addr = s_if.AWADDR;
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req.data = s_if.WDATA;
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req.strb = s_if.WSTRB;
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@(posedge s_if.ACLK);
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`uvm_info("respond_to_write_txn", $sformatf("Responding to AXI write transaction:\n%s", req.sprint()), UVM_LOW)
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s_if.AWREADY = 1'b1;
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endtask
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// ------------------------------------------------------------
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task respond_to_read_txn();
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axi_transaction req;
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req = axi_transaction::type_id::create("req");
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req.txn_type = AXI_READ;
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req.addr = s_if.ARADDR;
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@(posedge s_if.ACLK);
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`uvm_info("respond_to_write_txn", $sformatf("Responding to AXI write transaction:\n%s", req.sprint()), UVM_LOW)
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s_if.ARREADY = 1'b1;
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endtask
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endclass : axi_subordinate_driver
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