77 lines
2.4 KiB
Systemverilog
77 lines
2.4 KiB
Systemverilog
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class test_base extends uvm_test;
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`uvm_component_utils(test_base)
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testbench_env tb_env;
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uvm_table_printer tb_printer;
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function new(string name, uvm_component parent);
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super.new(name, parent);
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endfunction
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function void build_phase(uvm_phase phase);
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super.build_phase(phase);
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tb_env = testbench_env::type_id::create("tb_env", this);
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tb_printer = new("tb_printer");
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uvm_config_db#(testbench_env)::set(uvm_root::get(), "*", "tb_env", tb_env);
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endfunction
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virtual function void end_of_elaboration_phase(uvm_phase phase);
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`uvm_info("end_of_elaboration_phase", $sformatf("Topology:\n%s", this.sprint(tb_printer)), UVM_LOW)
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endfunction
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virtual task run_phase(uvm_phase phase);
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uvm_objection objection;
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objection = phase.get_objection();
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`uvm_info("run_phase", $sformatf("Raising objection"), UVM_LOW)
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phase.raise_objection(this);
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run_reset_phase(phase);
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run_test_phase(phase);
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run_flush_phase(phase);
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objection.set_drain_time(this, 20);
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`uvm_info("run_phase", $sformatf("Dropping objection"), UVM_LOW)
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phase.drop_objection(this);
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endtask
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virtual task run_reset_phase(uvm_phase phase);
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seq_reset rst_seq;
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`uvm_info("run_reset_phase", $sformatf("Starting reset"), UVM_LOW)
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rst_seq = seq_reset::type_id::create("reset_seq", this);
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rst_seq.start(tb_env.tb_sequencer);
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`uvm_info("run_reset_phase", $sformatf("Finishing reset"), UVM_LOW)
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endtask
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virtual task run_test_phase(uvm_phase phase);
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`uvm_warning("run_test_phase", $sformatf("This content is expected to be implemented in specific tests"))
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endtask
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virtual task run_flush_phase(uvm_phase phase);
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`uvm_info("run_flush_phase", $sformatf("Finishing test"), UVM_LOW)
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endtask
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endclass
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class test_basic extends test_base;
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`uvm_component_utils(test_basic)
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function new(string name, uvm_component parent);
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super.new(name, parent);
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endfunction
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virtual task run_test_phase(uvm_phase phase);
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seq_basic tst_seq;
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tst_seq = seq_basic::type_id::create("test_seq_basic");
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`uvm_info("run_test_phase", $sformatf("Starting stimulus"), UVM_LOW)
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tst_seq.start(tb_env.tb_sequencer);
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`uvm_info("run_test_phase", $sformatf("Finishing stimulus"), UVM_LOW)
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endtask
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endclass
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