Initial commit

* Bare skeleton implementation of everything
* Testbench builds with Verilator
* Test runs

tb/tb_seq_base.sv

@@ -0,0 +1,51 @@
+// Base sequence class for testbench sequences
+class tb_seq_base extends uvm_sequence;
+    `uvm_object_utils(tb_seq_base)
+
+    // Constructor
+    function new(string name = "tb_seq_base");
+        super.new(name);
+    endfunction
+endclass : tb_seq_base
+
+// ----------------------------------------------------------------------
+class axi_m_seq_base extends tb_seq_base;
+    tb_env env;
+
+    `uvm_object_utils(axi_m_seq_base)
+
+    // Constructor
+    function new(string name = "axi_m_seq_base");
+        super.new(name);
+    endfunction
+
+    // Task to start the sequence
+    virtual task body();
+        bit ok = uvm_config_db#(tb_env)::get(uvm_root::get(), "*", "env", env);
+    endtask
+endclass : axi_m_seq_base
+
+// ----------------------------------------------------------------------
+class axi_simple_seq extends axi_m_seq_base;
+    `uvm_object_utils(axi_simple_seq)
+
+    // Constructor
+    function new(string name = "axi_simple_seq");
+        super.new(name);
+    endfunction
+
+    // Task to start the sequence
+    virtual task body();
+        axi_transaction txn;
+
+        super.body();
+
+        `uvm_info("axi_simple_seq", "Starting simple AXI sequence", UVM_LOW)
+
+        `uvm_do(txn, env.get_axi_m_sequencer(), -1, {
+            addr == 32'h0000_0000; // Example address
+            data == 32'hDEAD_BEEF; // Example data
+            strb == 'hf; // Example byte enable
+        });
+    endtask
+endclass : axi_simple_seq