Separated manager and subordinate drivers
Other clean up and changes
This commit is contained in:
@@ -5,14 +5,15 @@
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typedef axi_sequencer;
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typedef axi_sequencer;
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class axi_agent extends uvm_agent;
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class axi_agent extends uvm_agent;
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axi_agent_type_t agent_type;
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axi_agent_type_t agent_type;
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virtual `AXI_INTF.MANAGER m_if;
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virtual `AXI_INTF.MANAGER m_if;
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virtual `AXI_INTF.SUBORDINATE s_if;
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virtual `AXI_INTF.SUBORDINATE s_if;
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virtual `AXI_INTF mon_if;
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// Declare the sequencer and driver
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// Declare the sequencer and driver
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axi_sequencer sequencer;
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axi_sequencer sequencer;
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axi_driver driver;
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axi_driver driver;
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axi_monitor monitor;
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axi_monitor monitor;
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`uvm_component_utils_begin(axi_agent)
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`uvm_component_utils_begin(axi_agent)
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`uvm_field_enum(axi_agent_type_t, agent_type, UVM_DEFAULT)
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`uvm_field_enum(axi_agent_type_t, agent_type, UVM_DEFAULT)
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@@ -35,13 +36,23 @@ class axi_agent extends uvm_agent;
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// Build phase
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// Build phase
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virtual function void build_phase(uvm_phase phase);
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virtual function void build_phase(uvm_phase phase);
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sequencer = axi_sequencer::type_id::create("sequencer", this);
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sequencer = axi_sequencer::type_id::create("sequencer", this);
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driver = axi_driver::type_id::create("driver", this);
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if (agent_type == MANAGER) begin
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// TODO: Additional variable md should not be needed. We should
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// able to use the 'driver' variable directly. But in Verilator
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// it results in an error: "No common base class exists"
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axi_manager_driver md = axi_manager_driver::type_id::create("driver", this);
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driver = md;
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end else begin // if (agent_type == SUBORDINATE) begin
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axi_subordinate_driver sd = axi_subordinate_driver::type_id::create("driver", this);
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driver = sd;
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end
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monitor = axi_monitor::type_id::create("monitor", this);
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monitor = axi_monitor::type_id::create("monitor", this);
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// Propagete the agent type to driver and monitor
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// Propagete the agent type to driver and monitor
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driver.set_agent_type(agent_type);
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driver.set_agent_type(agent_type);
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monitor.set_agent_type(agent_type);
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monitor.set_agent_type(agent_type);
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// Acquire the virtual interfaces from the configuration database
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if (agent_type == MANAGER) begin
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if (agent_type == MANAGER) begin
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if (!uvm_config_db#(virtual `AXI_INTF.MANAGER)::get(this, "", "axi_dvr_vif", m_if)) begin
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if (!uvm_config_db#(virtual `AXI_INTF.MANAGER)::get(this, "", "axi_dvr_vif", m_if)) begin
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`uvm_fatal("axi_agent", "AXI agent MANAGER interface not configured")
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`uvm_fatal("axi_agent", "AXI agent MANAGER interface not configured")
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@@ -54,8 +65,15 @@ class axi_agent extends uvm_agent;
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`uvm_info("axi_agent", $sformatf("Using AXI agent SUBORDINATE interface: axi_dvr_vif"), UVM_LOW)
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`uvm_info("axi_agent", $sformatf("Using AXI agent SUBORDINATE interface: axi_dvr_vif"), UVM_LOW)
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end
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end
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driver.set_virtual_intefaces(m_if, s_if);
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if (!uvm_config_db#(virtual `AXI_INTF)::get(this.get_parent(), "", "axi_mon_vif", mon_if)) begin
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monitor.set_virtual_intefaces(m_if, s_if);
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`uvm_fatal("axi_agent", "AXI monitor interface not configured")
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end
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`uvm_info("axi_agent", $sformatf("Using AXI monitor interface: axi_mon_vif"), UVM_LOW)
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// Propagate the virtual interfaces to driver and monitor
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driver.set_virtual_interfaces(m_if, s_if);
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monitor.set_virtual_interfaces(m_if, s_if);
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monitor.set_monitor_virtual_interface(mon_if);
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endfunction
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endfunction
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// --------------------------------------------------
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// --------------------------------------------------
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@@ -23,97 +23,10 @@ class axi_driver extends uvm_driver; // #(axi_transaction);
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// --------------------------------------------------
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// --------------------------------------------------
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// Set virtual interfaces
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// Set virtual interfaces
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function void set_virtual_intefaces(virtual `AXI_INTF.MANAGER m_if_p,
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function void set_virtual_interfaces(virtual `AXI_INTF.MANAGER m_if_p,
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virtual `AXI_INTF.SUBORDINATE s_if_p);
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virtual `AXI_INTF.SUBORDINATE s_if_p);
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`uvm_info("set_virtual_intefaces", $sformatf("Setting virtual interfaces"), UVM_LOW)
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`uvm_info("set_virtual_interfaces", $sformatf("Setting virtual interfaces"), UVM_LOW)
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m_if = m_if_p;
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m_if = m_if_p;
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s_if = s_if_p;
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s_if = s_if_p;
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// if (m_if == null && s_if == null) begin
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// `uvm_fatal("AXI_DRIVER", "Both MANAGER and SUBORDINATE interfaces are null")
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// end else if ((agent_type == MANAGER) && (m_if == null)) begin
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// `uvm_error("AXI_DRIVER", $sformatf("MANAGER interface is null"))
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// end else if ((agent_type == SUBORDINATE) && (s_if == null)) begin
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// `uvm_error("AXI_DRIVER", $sformatf("SUBORDINATE interface is null"))
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// end
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endfunction
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endfunction
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// --------------------------------------------------
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// Run phase
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virtual task run_phase(uvm_phase phase);
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`uvm_info("axi_driver", $sformatf("Running AXI driver: %s as %s",
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get_full_name(), agent_type.name()), UVM_LOW)
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if (agent_type == MANAGER) begin
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`uvm_info("axi_driver", $sformatf("Manager agent detected, driving transactions"), UVM_LOW)
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drive_transactions();
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end else if (agent_type == SUBORDINATE) begin
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`uvm_info("axi_driver", $sformatf("Subordinate agent detected, responding to transactions"), UVM_LOW)
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respond_to_transactions();
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end else begin
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`uvm_fatal("AXI_DRIVER", "Unknown agent type")
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end
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endtask
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// ------------------------------------------------------------
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task drive_transactions();
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if (m_if == null) begin
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`uvm_error("AXI_DRIVER", "MANAGER interface is null, cannot drive transactions")
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end
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forever begin
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`uvm_info("axi_driver", $sformatf("Starting to drive transactions for %s (rst_n = %0b)",
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get_full_name(), m_if.ARESETn), UVM_LOW)
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if (m_if.ARESETn == 0) begin
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`uvm_info("axi_driver", $sformatf("Waiting for reset to be released (rst_n = %0b)",
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m_if.ARESETn), UVM_LOW)
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@(posedge m_if.ARESETn);
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end
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`uvm_info("axi_driver", $sformatf("Starting to drive transactions for %s (rst_n = %0b)",
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get_full_name(), m_if.ARESETn), UVM_LOW)
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while (m_if.ARESETn != 0) begin
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uvm_sequence_item txn;
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`uvm_info("axi_driver", $sformatf("Waiting for next transaction"), UVM_LOW)
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seq_item_port.get_next_item(txn);
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drive_item(txn);
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seq_item_port.item_done();
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end
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end
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endtask
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// ------------------------------------------------------------
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task drive_item(uvm_sequence_item txn);
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axi_transaction req;
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if (!$cast(req, txn)) begin
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`uvm_fatal("AXI_DRIVER", "Invalid transaction type")
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end
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`uvm_info("drive_item", $sformatf("Driving AXI transaction:\n%s", req.sprint()), UVM_LOW)
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@(posedge m_if.ACLK);
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m_if.AWVALID = 1;
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m_if.AWADDR = req.addr;
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@(posedge m_if.ACLK);
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m_if.WDATA = req.data;
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m_if.WSTRB = req.strb;
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`uvm_info("drive_item", $sformatf("Driving AXI transaction done."), UVM_LOW)
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endtask
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// ------------------------------------------------------------
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task respond_to_transactions();
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forever begin
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@(posedge s_if.ARESETn);
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while (s_if.ARESETn != 0) begin
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@(posedge s_if.ACLK);
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@(negedge s_if.ACLK);
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end
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end
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endtask
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endclass : axi_driver
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endclass : axi_driver
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101
src/axi/axi_manager_driver.sv
Normal file
101
src/axi/axi_manager_driver.sv
Normal file
@@ -0,0 +1,101 @@
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// ----------------------------------------------------------------------
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// AXI Manager Driver
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// ----------------------------------------------------------------------
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class axi_manager_driver extends axi_driver;
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`uvm_component_utils(axi_manager_driver)
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// --------------------------------------------------
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// Constructor
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function new(string name = "axi_manager_driver", uvm_component parent = null);
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super.new(name, parent);
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endfunction
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// --------------------------------------------------
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virtual task run_phase(uvm_phase phase);
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`uvm_info("run_phase", $sformatf("Running AXI manager driver: %s",
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get_full_name()), UVM_LOW)
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if (m_if == null) begin
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`uvm_error("run_phase", "MANAGER interface is null, cannot drive transactions")
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end
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forever begin
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`uvm_info("run_phase", $sformatf("Starting to drive transactions for %s (rst_n = %0b)",
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get_full_name(), m_if.ARESETn), UVM_LOW)
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// Wait for reset to be de-asserted
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if (m_if.ARESETn == 0) begin
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`uvm_info("run_phase", $sformatf("Waiting for reset to be released (rst_n = %0b)",
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m_if.ARESETn), UVM_LOW)
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@(posedge m_if.ARESETn);
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end
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`uvm_info("run_phase", $sformatf("Starting to drive transactions for %s (rst_n = %0b)",
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get_full_name(), m_if.ARESETn), UVM_LOW)
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// Drive transactions until reset is asserted
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while (m_if.ARESETn != 0) begin
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uvm_sequence_item txn;
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axi_transaction req;
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`uvm_info("run_phase", $sformatf("Waiting for next transaction"), UVM_LOW)
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seq_item_port.get_next_item(txn);
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if (!$cast(req, txn)) begin
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`uvm_fatal("drive_txn", "Invalid transaction type")
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end
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drive_txn(req);
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seq_item_port.item_done();
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end
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end
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endtask
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// ------------------------------------------------------------
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task drive_txn(axi_transaction req);
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`uvm_info("drive_txn", $sformatf("Driving AXI transaction:\n%s", req.sprint()), UVM_LOW)
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if (req.txn_type == AXI_WRITE) begin
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drive_write_txn(req);
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end else if (req.txn_type == AXI_READ) begin
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drive_read_txn(req);
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end else begin
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`uvm_error("drive_txn", $sformatf("Unknown transaction type: %s", req.txn_type.name()))
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end
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`uvm_info("drive_txn", $sformatf("Driving AXI transaction done."), UVM_LOW)
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endtask
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// ------------------------------------------------------------
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// Drive a write transaction
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task drive_write_txn(axi_transaction req);
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@(posedge m_if.ACLK);
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m_if.AWVALID = 1;
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m_if.AWADDR = req.addr;
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@(posedge m_if.ACLK);
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m_if.WDATA = req.data;
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m_if.WSTRB = req.strb;
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while (m_if.AWREADY != 1) begin
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@(posedge m_if.ACLK);
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end
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`uvm_info("drive_write_txn", $sformatf("Address phase accepted (AWREADY=1)"), UVM_LOW)
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m_if.AWVALID = 0;
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`uvm_info("drive_write_txn", $sformatf("Done."), UVM_LOW)
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endtask
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// ------------------------------------------------------------
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// Drive a read transaction
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task drive_read_txn(axi_transaction req);
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@(posedge m_if.ACLK);
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m_if.ARVALID = 1;
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m_if.ARADDR = req.addr;
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@(posedge m_if.ACLK);
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while (m_if.ARREADY != 1) begin
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@(posedge m_if.ACLK);
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end
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`uvm_info("drive_read_txn", $sformatf("Address phase accepted (ARREADY=1)"), UVM_LOW)
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m_if.ARVALID = 0;
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`uvm_info("drive_read_txn", $sformatf("Done."), UVM_LOW)
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endtask
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endclass : axi_manager_driver
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@@ -4,6 +4,7 @@
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class axi_monitor extends uvm_monitor; // #(axi_transaction);
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class axi_monitor extends uvm_monitor; // #(axi_transaction);
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virtual `AXI_INTF.MANAGER m_if;
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virtual `AXI_INTF.MANAGER m_if;
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virtual `AXI_INTF.SUBORDINATE s_if;
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virtual `AXI_INTF.SUBORDINATE s_if;
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virtual `AXI_INTF mon_if;
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axi_agent_type_t agent_type;
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axi_agent_type_t agent_type;
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// Declare the analysis export
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// Declare the analysis export
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@@ -30,14 +31,22 @@ class axi_monitor extends uvm_monitor; // #(axi_transaction);
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// --------------------------------------------------
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// --------------------------------------------------
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// Set virtual interfaces
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// Set virtual interfaces
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function void set_virtual_intefaces(virtual `AXI_INTF.MANAGER m_if_p,
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function void set_virtual_interfaces(virtual `AXI_INTF.MANAGER m_if_p,
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virtual `AXI_INTF.SUBORDINATE s_if_p);
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virtual `AXI_INTF.SUBORDINATE s_if_p);
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`uvm_info("set_virtual_intefaces", $sformatf("Setting virtual interfaces"), UVM_LOW)
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`uvm_info("set_virtual_interfaces", $sformatf("Setting virtual interfaces"), UVM_LOW)
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m_if = m_if_p;
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m_if = m_if_p;
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s_if = s_if_p;
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s_if = s_if_p;
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endfunction
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endfunction
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// --------------------------------------------------
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// Set monitor virtual interfaces
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function void set_monitor_virtual_interface(virtual `AXI_INTF mon_if_p);
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`uvm_info("set_monitor_virtual_interface", $sformatf("Setting monitor virtual interface"), UVM_LOW)
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mon_if = mon_if_p;
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endfunction
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// --------------------------------------------------
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// --------------------------------------------------
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// Run phase
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// Run phase
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virtual function void run_phase(uvm_phase phase);
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virtual function void run_phase(uvm_phase phase);
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@@ -56,13 +65,31 @@ class axi_monitor extends uvm_monitor; // #(axi_transaction);
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// --------------------------------------------------
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// --------------------------------------------------
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// Monitor logic to capture transactions
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// Monitor logic to capture transactions
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virtual task do_monitor();
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virtual task do_monitor();
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if (agent_type == MANAGER) begin
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$fwrite(trk_file, "AXI monitor (%0s Mode)\n", agent_type.name());
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do_manager_monitor();
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$fwrite(trk_file, "--------------------------------------------------\n");
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end else if (agent_type == SUBORDINATE) begin
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do_subordinate_monitor();
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end else begin
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forever begin
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`uvm_fatal("AXI_MONITOR", "Unknown agent type")
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@(posedge mon_if.ACLK);
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if (mon_if.ARESETn != 0) begin
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if (mon_if.AWVALID == 1) begin
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$fwrite(trk_file, "AXI WRITE - ADDR=0x%h DATA=0x%h STRB=%h\n",
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mon_if.AWADDR, mon_if.WDATA, mon_if.WSTRB);
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end
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if (mon_if.ARVALID == 1) begin
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$fwrite(trk_file, "AXI READ - ADDR=0x%h\n",
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mon_if.ARADDR);
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end
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end
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end
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end
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// if (agent_type == MANAGER) begin
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// do_manager_monitor();
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// end else if (agent_type == SUBORDINATE) begin
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// do_subordinate_monitor();
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||||||
|
// end else begin
|
||||||
|
// `uvm_fatal("AXI_MONITOR", "Unknown agent type")
|
||||||
|
// end
|
||||||
endtask
|
endtask
|
||||||
|
|
||||||
// --------------------------------------------------
|
// --------------------------------------------------
|
||||||
|
@@ -9,6 +9,8 @@ package axi_pkg;
|
|||||||
|
|
||||||
// UVM components
|
// UVM components
|
||||||
`include "axi_driver.sv"
|
`include "axi_driver.sv"
|
||||||
|
`include "axi_subordinate_driver.sv"
|
||||||
|
`include "axi_manager_driver.sv"
|
||||||
`include "axi_monitor.sv"
|
`include "axi_monitor.sv"
|
||||||
`include "axi_agent.sv"
|
`include "axi_agent.sv"
|
||||||
endpackage
|
endpackage
|
||||||
|
72
src/axi/axi_subordinate_driver.sv
Normal file
72
src/axi/axi_subordinate_driver.sv
Normal file
@@ -0,0 +1,72 @@
|
|||||||
|
// ----------------------------------------------------------------------
|
||||||
|
class axi_subordinate_driver extends axi_driver;
|
||||||
|
|
||||||
|
`uvm_component_utils(axi_subordinate_driver)
|
||||||
|
|
||||||
|
// --------------------------------------------------
|
||||||
|
// Constructor
|
||||||
|
function new(string name = "axi_subordinate_driver", uvm_component parent = null);
|
||||||
|
super.new(name, parent);
|
||||||
|
endfunction
|
||||||
|
|
||||||
|
// --------------------------------------------------
|
||||||
|
virtual task run_phase(uvm_phase phase);
|
||||||
|
`uvm_info("run_phase", $sformatf("Running AXI subordinate driver: %s",
|
||||||
|
get_full_name()), UVM_LOW)
|
||||||
|
|
||||||
|
if (s_if == null) begin
|
||||||
|
`uvm_error("run_phase", "subordinate interface is null, cannot respond to transactions")
|
||||||
|
end
|
||||||
|
|
||||||
|
forever begin
|
||||||
|
@(posedge s_if.ARESETn);
|
||||||
|
|
||||||
|
while (s_if.ARESETn != 0) begin
|
||||||
|
@(posedge s_if.ACLK);
|
||||||
|
|
||||||
|
// Following could happen on the same cycle
|
||||||
|
if (s_if.AWVALID == 1'b1) begin
|
||||||
|
respond_to_write_txn();
|
||||||
|
end
|
||||||
|
|
||||||
|
if (s_if.ARVALID == 1'b1) begin
|
||||||
|
respond_to_read_txn();
|
||||||
|
end
|
||||||
|
|
||||||
|
@(negedge s_if.ACLK);
|
||||||
|
end
|
||||||
|
end
|
||||||
|
endtask
|
||||||
|
|
||||||
|
// ------------------------------------------------------------
|
||||||
|
task respond_to_write_txn();
|
||||||
|
axi_transaction req;
|
||||||
|
|
||||||
|
req = axi_transaction::type_id::create("req");
|
||||||
|
req.txn_type = AXI_WRITE;
|
||||||
|
req.addr = s_if.AWADDR;
|
||||||
|
req.data = s_if.WDATA;
|
||||||
|
req.strb = s_if.WSTRB;
|
||||||
|
|
||||||
|
@(posedge s_if.ACLK);
|
||||||
|
|
||||||
|
`uvm_info("respond_to_write_txn", $sformatf("Responding to AXI write transaction:\n%s", req.sprint()), UVM_LOW)
|
||||||
|
|
||||||
|
s_if.AWREADY = 1'b1;
|
||||||
|
endtask
|
||||||
|
|
||||||
|
// ------------------------------------------------------------
|
||||||
|
task respond_to_read_txn();
|
||||||
|
axi_transaction req;
|
||||||
|
|
||||||
|
req = axi_transaction::type_id::create("req");
|
||||||
|
req.txn_type = AXI_READ;
|
||||||
|
req.addr = s_if.ARADDR;
|
||||||
|
|
||||||
|
@(posedge s_if.ACLK);
|
||||||
|
|
||||||
|
`uvm_info("respond_to_write_txn", $sformatf("Responding to AXI write transaction:\n%s", req.sprint()), UVM_LOW)
|
||||||
|
|
||||||
|
s_if.ARREADY = 1'b1;
|
||||||
|
endtask
|
||||||
|
endclass : axi_subordinate_driver
|
@@ -1,10 +1,10 @@
|
|||||||
// ----------------------------------------------------------------------
|
// ----------------------------------------------------------------------
|
||||||
class axi_transaction extends uvm_sequence_item;
|
class axi_transaction extends uvm_sequence_item;
|
||||||
// Declare AXI transaction fields
|
// Declare AXI transaction fields
|
||||||
rand axi_transaction_type_t txn_type; // Transaction type (read/write)
|
rand axi_transaction_type_t txn_type; // Transaction type (read/write)
|
||||||
rand bit [31:0] addr; // Address
|
rand bit [`ADDR_WIDTH-1:0] addr; // Address
|
||||||
rand bit [31:0] data; // Data
|
rand bit [`DATA_WIDTH-1:0] data; // Data
|
||||||
rand bit [3:0] strb; // Byte enable
|
rand bit [`DATA_WIDTH_DIV_8-1:0] strb; // Byte enable
|
||||||
|
|
||||||
`uvm_object_utils_begin(axi_transaction)
|
`uvm_object_utils_begin(axi_transaction)
|
||||||
`uvm_field_enum(axi_transaction_type_t, txn_type, UVM_DEFAULT)
|
`uvm_field_enum(axi_transaction_type_t, txn_type, UVM_DEFAULT)
|
||||||
|
@@ -42,10 +42,12 @@ class axi_simple_seq extends axi_m_seq_base;
|
|||||||
|
|
||||||
`uvm_info("axi_simple_seq", "Starting simple AXI sequence", UVM_LOW)
|
`uvm_info("axi_simple_seq", "Starting simple AXI sequence", UVM_LOW)
|
||||||
|
|
||||||
`uvm_do(txn, env.get_axi_m_sequencer(), -1, {
|
repeat(10) begin
|
||||||
addr == 32'h0000_0000; // Example address
|
`uvm_do(txn, env.get_axi_m_sequencer(), -1, {
|
||||||
data == 32'hDEAD_BEEF; // Example data
|
addr != {`ADDR_WIDTH{1'b0}};
|
||||||
strb == 'hf; // Example byte enable
|
data != {`DATA_WIDTH{1'b0}};
|
||||||
});
|
strb == 'hf; // Example byte enable
|
||||||
|
});
|
||||||
|
end
|
||||||
endtask
|
endtask
|
||||||
endclass : axi_simple_seq
|
endclass : axi_simple_seq
|
||||||
|
@@ -20,6 +20,7 @@ module tb_top (input logic sys_clk);
|
|||||||
initial begin
|
initial begin
|
||||||
uvm_config_db#(virtual `AXI_INTF.MANAGER)::set(uvm_root::get(), "uvm_test_top.env.axi_m", "axi_dvr_vif", a_if.MANAGER);
|
uvm_config_db#(virtual `AXI_INTF.MANAGER)::set(uvm_root::get(), "uvm_test_top.env.axi_m", "axi_dvr_vif", a_if.MANAGER);
|
||||||
uvm_config_db#(virtual `AXI_INTF.SUBORDINATE)::set(uvm_root::get(), "uvm_test_top.env.axi_s", "axi_dvr_vif", a_if.SUBORDINATE);
|
uvm_config_db#(virtual `AXI_INTF.SUBORDINATE)::set(uvm_root::get(), "uvm_test_top.env.axi_s", "axi_dvr_vif", a_if.SUBORDINATE);
|
||||||
|
uvm_config_db#(virtual `AXI_INTF)::set(uvm_root::get(), "uvm_test_top.env", "axi_mon_vif", a_if);
|
||||||
|
|
||||||
run_test();
|
run_test();
|
||||||
end
|
end
|
||||||
@@ -27,7 +28,7 @@ module tb_top (input logic sys_clk);
|
|||||||
// --------------------------------------------------
|
// --------------------------------------------------
|
||||||
initial begin
|
initial begin
|
||||||
$dumpfile("wave.vcd");
|
$dumpfile("wave.vcd");
|
||||||
$dumpvars();
|
$dumpvars(0, "tb_top");
|
||||||
end
|
end
|
||||||
|
|
||||||
// --------------------------------------------------
|
// --------------------------------------------------
|
||||||
|
Reference in New Issue
Block a user