43 lines
1.0 KiB
Makefile
43 lines
1.0 KiB
Makefile
# Make and run project
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UVM_HOME=/home/mahesh/git/uvm-verilator
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PROJ=uvm_tb
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SV_FILES=$(shell ls *.sv)
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SV_SRC=$(UVM_HOME)/src/uvm_pkg.sv tb_pkg.sv
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SV_DEPS=$(SV_FILES)
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CPP_SRC=sim_$(PROJ).cpp
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TIMESCALE= --timescale '1ns/1ns'
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UVM_DEFINES=+define+UVM_NO_DPI \
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+define+UVM_REPORT_DISABLE_FILE_LINE
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DISABLED_WARNINGS=-Wno-WIDTHTRUNC -Wno-WIDTHEXPAND \
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-Wno-CASTCONST -Wno-CONSTRAINTIGN \
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-Wno-MISINDENT -Wno-REALCVT \
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-Wno-SYMRSVDWORD -Wno-CASEINCOMPLETE
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ifndef TEST_NAME
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TEST_NAME=test_base
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endif
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build: $(SV_DEPS)
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verilator -I$(UVM_HOME)/src -I. \
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-o $(PROJ).sim \
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--binary \
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-j 4 \
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--error-limit 10 \
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--timing $(TIMESCALE) \
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+define+SVA_ON \
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$(UVM_DEFINES) \
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$(DISABLED_WARNINGS) \
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$(SV_SRC)
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run:
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if [ ! -d logs/$(TEST_NAME) ]; then mkdir -p logs/$(TEST_NAME); fi
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cd logs/$(TEST_NAME) && ../../obj_dir/$(PROJ).sim +UVM_TESTNAME=$(TEST_NAME) |& tee sim.log
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clean:
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rm -rf obj_dir
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